CCOM 4086 - Computer Architecture 1

Course Announcement

CCOM 4086 - Computer Architecture 1

Professor

Humberto Ortiz-Zuazaga
Office: NCL A-159
Telephone: 787-764-0000 x7430
email: humberto.ortiz@upr.edu
Web page: http://www.hpcf.upr.edu/~humberto/
Office hours: Mondays and Tuesdays from 11:00 AM to 12:00 noon or by appointment.

Description

Humberto Ortiz Zuazaga will be teaching undergraduate computer architecture Fall 2013 in UPR-RRP. In this course the student is exposed to critical issues of the architecture of modern computers. The main objective is to provide students the knowledge necessary to understand the logic of behavior of the main components of modern computers. Topics include the logical design, data representation, the different types of memory and its organization, registers, the CPU and its organization, construction and operation of buses, I/O devices and their interfaces. Different levels of abstraction of the computer architecture are studied: a logical level, the architecture of micro-level, level machine language, assembly language and operating system level. The course also examines the main features of CISC and RISC architectures.

Number of hours/credits:

3 hours per week, 3 credits

Prerequisites:

CCOM 3033 - Introduction to problem solving with programming

Course objectives:

  1. Understand the instruction set of RISC assembly and a computer are represented as the instructions on the computer.
  2. Describe several types of memory used in a computer (eg, cache, main memory, virtual), their hierarchy, and function as part of the system.
  3. Understanding the communication process with input and output devices and different mechanisms for interfacing with the peripheral units.
  4. Understand the process of translation required for the execution of an instruction-level assembly language.
  5. Understand the main components in a modern computer
  6. Understand the main features of CISC and RISC architectures
  7. Describe the sequence of micro-operations required to complete the execution of an instruction-level machine language
  8. Understand the logic gates that are designed with the CPU: Boolean, multiplexers, decoders, flip / flops, registers
  9. Understand the methods of representation of numbers and how arithmetic is performed on computers
  10. Evaluate the performance of a computer and understand the factors affecting it.
  11. Understand the process of designing a computer from a single level of logic gates based on conditions of operation and instruction set.
  12. Understand some of the techniques used to improve the performance of a computer at the architectural (pipelining, multithreading, superscalar).
  13. Understand the effects of technology and its impact in individuals and society

Course schedule:

Class will meet Tuesday and Thursdays,

The proposed schedule of lectures, subject to change:

Lectures TopicReadingObjective
2Introduction to Computer Architecture Chapter 1: 1.1 - 1.35
2Performance and power Chapter 1: 1.4 - 1.910, 13
4Computer instructions Chapter 21, 4, 6, 7
2Computer arithmetic Chapter 39
4Simple Processor Chapter 4: 4.1 - 4.48, 11
2Pipelining Chapter 4: 4.5 - 4.612
4Memory hierarchy Chapter 52
4Storage and Input/Output Chapter 63
4Parallel computing Chapter 712

Instructional strategies:

The professor will discuss each topic, students will complete a practical excercise for each topic discussed in class.

Instructional resources:

A website with all the course lectures and supplemental materials and references is available on the CCOM Moodle:

http://moodle.ccom.uprrp.edu/course/view.php?id=114

This term we will be using Piazza for class discussion. The system is highly catered to getting you help fast and efficiently from classmates, the TA, and myself. Rather than emailing questions to the teaching staff, I encourage you to post your questions on Piazza. If you have any problems or feedback for the developers, email team@piazza.com.

Find our class page at: https://piazza.com/uprrp/fall2013/ccom4086/home.

Textbook:

"Computer Organization and Design: the hardware software interface, Revised Fourth Edition" by Patterson and Hennesey.

Evaluation strategy:
  1. Participation in course forums (moodle, classroom), 5% final grade
  2. Homework, 25% final grade
  3. Two partial exams, 50% final grade
  4. Student reports, 20% final grade

Students with disabilities properly registred with the Office of Affairs for Persons with Disabilities (Oficina de Asuntos para la Persona con Impedimento (O.A.P.I.)) should notify the professor at the start of the semester. The professor will make reasonable accomodations to support the student, in consultation with OAPI.


Troglodita approved!

Humberto Ortiz Zuazaga
humberto@hpcf.upr.edu

Most recent change: 2013/8/13 at 09:36
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